Open Directory - Computers: Hardware: Components: Processors: DLX

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Open Directory - Computers: Hardware: Components: Processors: DLX

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ASPIDA Project - ASynchronous, open source, Processor IP of the DLX Architecture. Goal: show feasibility to design and deliver asynchronous open IPs in portable, re-usable way. Information, downloads. Open source hardware.
DLX CPU in SCMOS - Photo with descriptions.
DLX Implementation at MSU - Documents DLX implementation by Microsystems Prototyping Laboratory (MPL), MSU Engineering Research Center; used as design driver to help validate standard cell libraries.
DLX Information - Documents: getting started, instruction set summary and description, simulator manual.
DLX Instruction Slides - Tables of instructions, categorized, as PDF slides. By Guy Even, Tel Aviv University. [PDF]
DLX in VHDL - VHDL model of processor; most instructions use 5 clock cycles to run, jumps use 3, floating point timing not fully accurate because fp instructions also take 5 cycles to run; description, download.
David R. Kaeli, Professor - Director of Northeastern University Computer Architecture Research Laboratory, and co-author of Computer Architecture: A Quantitative Approach. Professional information with some links.
Implementation of 5-stage DLX Pipeline - Introductory tutorial with definitions, explanations, examples to show basic pipelining ideas; applet simulation lets users choose instructions to run, and see how pipeline works from direct experience.
Introduction to Operating Systems - DLXOS information needed for programming, from introductory course on OSs.
Norman Matloff's DLX Tutorial - Information on DLX processor simulator and compiler, DLXsim, interactive program, loads assembly programs and simulates operation of computer on them, single-stepping or continuous execution.
Out of Order Execution - Master's Thesis: Design and Evaluation of a RISC Processor with a Tomasulo Scheduler. Uses DLX. HTML, PS, GZ, PDF.
Superscalar DLX Processor - Diagram, description, download.
The DLX Instruction Set Architecture Handbook - By Philip M. Sailer, David R. Kaeli; Morgan Kaufmann, 1996, ISBN 1558603719, 1st edition. Definitive work on DLX instructions. Information and abstract. ACM Portal.
The DLX Processor - Class overview with tables (instruction format, set) and diagrams (timing), some other information. By Ethan Miller, University of Maryland.
Verilog Model for DLX Processor - PDF slides, mostly code. [PDF]
Wikipedia: DLX - Encyclopedia article with links to many related topics.
WinDLX - Program for MS Windows, an assembly interpreter for DLX assembly language; instructions, source code, downloads. By Javier Echaiz, National University of the South.
Computer Architecture: A Quantitative Approach - Book review, explains that book is a classic and standard work in its field. Ars Technica. (September 01, 1999)

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Open Directory - Computers: Hardware: Components: Processors: DLX

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The DLX is a reduced instruction set computer (RISC) processor architecture. It is mainly a cleaner, simpler MIPS architecture, with a simple 32-bit load/store design, and intended mainly for education, as are Donald Knuth's MIX and MMIX architectures. All three are widely used in college-level computer architecture courses. DLX was introduced in the textbook "Computer Architecture: A Quantitative Approach", by John L. Hennessy and David A. Patterson, the main designers of the MIPS and Berkeley RISC designs, respectively, which are the two benchmark RISC designs.

Open Directory Computers: Programming: Languages: Assembly: MIX-MMIX
Open Directory Computers: Programming: Languages: Education
Open Directory Computers: Programming: Education
Open Directory Computers: Software: Operating Systems: Education
Open Directory Computers: Hardware: Components: Processors: RISC
Open Directory Computers: Hardware: Components: Processors: MIPS
Open Directory Science: Technology: Electronics: Design: Hardware Description Languages: VHDL

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